2023 Author: Bryan Walter | [email protected]. Last modified: 2023-05-21 22:24
Transmission electron microscope image of the new chip
IBM has announced the creation of the first chip based on the so-called 2-nanometer process technology. It is built on the GAA architecture and has a transistor density of 333 million per square millimeter. It is expected that the processors produced according to the new process technology will enter serial production no earlier than 2024.
Throughout most of the history of the semiconductor industry, chip makers have tried to reduce the size of transistors and their components, because there are several advantages. Firstly, the smaller size of the transistor allows faster switching of its states and less energy wasted on it. This increases the overall energy efficiency of the chip, which often directly affects properties that are important for the consumer, for example, it allows you to increase the duration of operation on a single battery charge. Second, with a smaller transistor, more chips can be placed on a single wafer. In addition, it reduces the time required for the signal to travel between the chip components.
Traditionally, the technological process in chips is usually called in nanometers. However, if earlier this parameter carried a specific physical meaning, as a rule, reflecting the gate length or the size of the smallest component in the transistor, then for a long time this term has not been tied to any specific value and has actually turned into a marketing name.
IBM, which itself does not produce chips, but is actively developing in this area and licensing technologies to other manufacturers, announced the creation of the first test chip made using a 2-nanometer process technology. The new process technology uses the GAA (Gate-all-around) architecture, in which the gate of the transistor surrounds the channel from all sides. In the IBM implementation, the channel consists of three plates located one above the other and having a thickness (height) of 5 nanometers. The channel length is 12 nanometers.
Comparison of Nanoplate Architecture with Classical FinFET Architecture
In a press release, the company notes that the new process technology will achieve 45 percent more performance or 75 percent less power consumption than the best 7nm chips in existence today. At the same time, it is not known which manufacturer's process technology we are talking about.
Parameters of the new technical process
Considering that the name of the technical process in nanometers today has almost no semantic meaning, the best indicator for comparing the technical processes of different manufacturers with each other is the density of transistors on the plate. As noted by AnandTech, judging by the data provided by IBM, the density of their process technology is 333, 33 million transistors per square millimeter. For comparison, TSMC's 3-nanometer process (not yet used in mass production) allows to achieve a density of 292, 21 million per square millimeter, and with a 7-nanometer process from Intel (also in development), the density reaches 237, 18 million per square millimeter. millimeter.
Comparison of the density of transistors in technological processes of different companies
IBM develops not only architectures for classical chips, but also quantum computers. In 2017, it introduced a 50-qubit computer, and in 2020 it introduced and provided third-party companies with a 65-qubit quantum computer.